uC-OS-III Features with Longer Critical Sections
The table below shows several µC/OS-III features that have potentially longer critical sections. Knowledge of these will help the user decide whether to direct µC/OS-III to use one critical section over another.
Table - Reducing interrupt disable time
Feature | Reason |
---|---|
Multiple tasks at the same priority | Although this is an important feature of µC/OS-III, multiple tasks at the same priority create longer critical sections. However, if there are only a few tasks at the same priority, interrupt latency would be relatively small. |
Event Flags See Synchronization | If multiple tasks are waiting on different events, going through all of the tasks waiting for events requires a fair amount of processing time, which means longer critical sections. If only a few tasks (approximately one to five) are waiting on an event flag group, the critical section would be short enough to use the interrupt disable method. |
Broadcast on Post calls See OSSemPost() and OSQPost() descriptions µC/OS-III API Reference. | µC/OS-III disables interrupts while processing a post to multiple tasks in a broadcast. |