Driver Architecture - Parallel NOR

When used with a parallel NOR device, the NOR driver is three layered, as depicted in the figure below. The generic NOR driver, as always, provides sector abstraction and performs wear-leveling (to make certain all blocks are used equally). Below this, the physical-layer driver implements a particular command set to read and program the flash and erase blocks. Lastly, a BSP implements function to initialize and unitialize the bus interface. Device commands are executed by direct access to the NOR, at locations appropriately offset from the configured base address.