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Release date : 2013-12-18
Requirements
- µC/LIB V1.35.00
New features & improvements
- Cache maintenance: Cache maintenance functionalities are now implemented in uC/CPU for use by other Micrium products.
- Cortex-M3 & M4: Performance improvements for the IAR toolchain.
- Online documentation: The reference manual is now available online. Please visit docmicrium.micriumatlassian.com for net for the latest version.
Bug fixes
- (CPU-59) Renesas RX: Added missing definition of CPU_CFG_STK_ALIGN_BYTES.
- (CPU-64, CPU-68) Renesas RX: Added missing definitions of the memory barrier macros.
Version 1.29.02.04
Release date : 2013-09-24
Requirements
- µC/LIB V1.35.00
Bug fixes
- (CPU-46) Cortex-A: Incorrect preprocessor condition to detect the endianness of the GNU and CCS ports.
- (CPU-47) Cortex-A9: Incorrect preprocessor condition to detect the endianness of the GNU and CCS ports.
Version 1.29.02.03
Release date : 2013-08-06
Requirements
- µC/LIB V1.35.00
New features & improvements
- ARM Cortex-A: New port for the entire 32-bits ARM Cortex-A family. Support for the following compilers/toolchains is included:
- ARM Compilation Tools (DS-5)
- GNU
- IAR EWARM
- TMS470 Compiler Toolchain (TI Code Composer Studio)
- C++ compilation: Building in C++ now supported for all the ports.
Bug fixes
- (CPU-40) Renesas RX: CPU_CFG_KA_IPL_BOUNDARY should be defined to a default value when left unconfigured.
- (CPU-39) Incorrect file extension for some GCC assembler files. The following ports were affected:
- AVR32/UC3
- AVR32/AP7000
- ARM-Cortex-M4
- MCF5272
- (CPU-35) Cortex A9: Invalid files in the IAR port.
Deprecated features
- The following CPU ports are now supported by the new ARM-Cortex-A port and will be removed in a future release.
- ARM-Cortex-A8
- ARM-Cortex-A9
Version 1.29.02.02
Release date : 2013-05-22
Requirements
- µC/LIB V1.35.00
New features & improvements
- POSIX: New port for testing on POSIX and POSIX-like systems.
Bug fixes
- (CPU-30) Renesas RX: IAR port should use __set_interrupt_level() instead of __set_interrupt_state().
- (CPU-32) Renesas RX: Invalid quote characters in GNURX/cpu.h.
Version 1.29.02.01
Release date : 2013-04-18
Requirements
- µC/LIB V1.35.00
New features & improvements
- Renesas RX: Support for improved uCOS-III port and interrupt handling.
Bug fixes
- (CPU-24) Cortex-R4: Missing include of intrinsics.h in the IAR port.
Version 1.29.02
Release date : 2013-03-18
Requirements
- µC/LIB V1.35.00
New features & improvements
- ARMv7 memory barriers: New memory barriers implementation for the Cortex A, R and M ports.
- Stack alignment: New cpu specific define CPU_STK_ALIGN_BYTES for the platform required stack alignment.
- Cortex A8: New port for the IAR toolchain.
- Cortex A9: New port for the RealView/ARMCC toolchain.
- Endianness test: New global constant CPU_EndiannessTest for testing endianness at runtime.
Bug fixes
- (CPU-20) Renesas RX: Volatile registers require the __evenaccess type qualifier on RXC.
- (CPU-15) cpu_bsp.c not buildable by default.
- (CPU-13) ARMv7-AR: Add missing data synchronisation barriers in critical sections.
- (CPU-6) Cortex-M: Interrupt priority incorrectly set for the M0, M3 and M4 ports.
Version 1.29.01.01
Release date : 2012-12-03
Requirements
- µC/LIB V1.35.00
New features & improvements
- Renesas RX port: New unified port for most of the Renesas RX series other than the RX610.
- Configurable endianness: CPU endianness can now be configured in cpu_cfg.h for bi-endian architectures. Currently only the RX port supports this feature.
API Changes
- N/A
Bug fixes
- N/A
Deprecated features
- The following CPU architectures are now supported by the new RX port and will be removed in a future release. Note that the RX610 still requires a separate port.
- RX210
- RX62N
- RX63N
- RX600
- RX630
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