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Anchor10469341046934 NAND Flash Driver Anchor10469351046935Standard storage media (such as hard drives) and managed flash-based devices (such as SD/MMC and CF cards) require relatively simple drivers that convert the file system’s request to read or write a sector into a hardware transaction. In comparison, the driver for a raw NAND flash is more complicated. Flash is divided into large blocks (often 16-kB to 512-kB); however, the high-level software (for example a FAT file system) expects to read or write small sectors (512-bytes to 4096-bytes) atomically. The driver implements a NAND block abstraction to conceal the device geometry from the file system. To aggravate matters, each block may be subjected to a finite number of erases. A wear-leveling algorithm must be employed so that each block is used equally. All these mechanisms are grouped in the main layer of the driver, called the NAND translation layer. Anchor10039601003960

The NAND flash driver included in µC/FS has the following features: Anchor10039611003961

Dynamic wear-leveling: Using logical block addressing, the driver is able to change the physical location of written data on the NAND flash, so that a single memory location does not wear early while other locations are not used. Anchor10039621003962

Fail-safe to unexpected power-loss: The NAND flash driver was designed so that write transactions are atomic. After an unexpected power-down, the NAND flash’s low-level format will still be consistent, the device will be remounted as if the transaction never occurred. Anchor10039651003965

Scalable: Various configuration options (see section 1315-3-1 “Translation Layer Configuration” on page 173) are available for you to adjust the memory footprint; the speed and the wear-leveling performance of the driver. Anchor10039671003967

Flexible controller layer: You can provide your own implementation of the controller layer to take advantage of hardware peripherals and reduce CPU usage. However, a generic controller driver that is compatible with most parallel NAND flash devices and micro-controllers is provided.

Anchor10039681003968Error correction codes (ECC) management: Error correction codes are used to eliminate the bit read errors typical to NAND flash. It is easy to provide a software implementation of an ECC scheme or to interface to a hardware engine for each device used. It is then possible to configure the size of the codewords and the level of protection required to suit the needs of your application. Anchor10408881040888

Wide support for different NAND flashes: Most NAND flash memories are compatible with the driver, including large pages, small pages, SLC and MLC (single and multiple level cells) flash memory. Please contact Micrium to inquire about µC/FS’s compatibility with specific NAND devices.