Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

Table of Contents
maxLevel2
minLevel2
indent20px

Version 1.44

Release date: 2019-7-26

Requirements

  • Xilinx SDK 2018.3

New features & improvements

  • General

    • [583] Support for Xilinx SDK 2018.3.
    • [301][490][553] Updated ucos_standalone to standalone v6.8.
      • Note: stdin/stdout under ucos_standalone should now be used to select the UART peripherals.
    • [474][615] BSP configuration options have been revamped to coincide with the latest product releases.
    • [624] Removed the ucos cpu drivers. The Xilinx drivers are now used instead.

  • Zynq Ultrascale+
    • [476] Added TCPIP support for the RPU.

Bug Fixes

  • General

    • [80] XSDK generates an error when creating standalone projects with ucos repo.
    • [255] Tx buffer leaks in the GEM driver where patched with the new version of uC/TCP-IP.
    • [472] Unable to disable Micrium heap through the BSP configuration window.
    • [473] Unable to disable uCOS-III tick task through the BSP configuration window.
      • Note: The tick task was removed in uCOS-III V3.07.
    • [547] axidma driver failed to build with ucos repo.
    • [552] UCOS_TCPIP_PhyCfgInit() chooses incorrect PHY address.
    • [572] ucos_startup.c uses non Thread-Safe print function.
    • [587] AXIUARTLite_RdByte releases the wrong lock.
    • [589] xparameters.h does not populate with fabric interrupts.
    • [599] Zynq-7000 locks on warm-boot.
    • [695] Category headings in the BSP configuration window could be incorrectly configured as booleans.

  • Ultrascale+

    • [262] Fixed issue with UCOS_IntSrcDis() having a double CPU_CRITICAL_ENTER().

Version 1.43

Release date: 2018-1-22

Requirements

  • Xilinx SDK 2017.4

New features & improvements

  • General

    • [295] Support for Xilinx SDK 2017.4
    • [221][222] Libmetal and OpenAMP support for uC/OS-III
    • [297] Complete update of software stacks to their latest releases
    • [289] Cleanup of build warnings for the BSPs

  • Zynq Ultrascale+
    • [221][222] Libmetal and OpenAMP support for the RPU
    • [243] Removed unused MMU table from the R5 startup code to save 4KB of memory.

  • Zynq 7000
    • [92] Translation table now uses sections instead of supersections to improve interoperability with the Xilinx MMU functions.

Bug Fixes

  • General

    • [203] Fixed issue with the USB Host MSC demo not allocating enough heap space by default
    • [257] Fixed issue with breakpoints not being recognized in the USB Device driver.
    • [258] Fixed error when cleaning the ucos_standalone component.
    • [262] Fixed issue with CPU_CFG_CACHE_MGMT_EN only being enabled when configured to "auto".
    • [293] Fixed error when generating BSPs for hardware platforms containing cascaded AXI interrupt controllers.
      • Note: Use of AXI interrupt controllers in cascaded mode is not currently supported by the uC/OS repository.
  • Ultrascale+

    • [262] Fixed issue with UCOS_IntSrcDis() having a double CPU_CRITICAL_ENTER().

Version 1.42

Release date: 2017-7-6

Requirements

  • Vivado 2017.2
  • Vivado 2016.4

New features & improvements

  • General

    • DNS demo now waits for the link to go up before resolving the URL.
    • Increased the default stack size for the net TX Dealloc Task to prevent buffer overflows on 64-bit hardware.

  • Zynq Ultrascale+

    • Initial TCPIP support for the A53: GEM controller with 64-bit address space support.
    • Disabled ECC in the R5 startup code to prevent data aborts when using ATCM.
    • Added uC/OS-II port for the A53.
    • Initial XEN support for the A53.

...

Release date : 2015-12-22

New features & improvements

  • Zynq UltraScale+ APU (Cortex-A53) : tick source can now be configured between EL1 physical or EL3 physical timers
  • Zynq UltraScale+ APU (Cortex-A53) : Timestamp support in the CPU software module

Requirements

  • Vivado 2015.1

Bug fixes

Zynq-7000 (Cortex-A9)

...

Release date : 2015-12-07

New features & improvements

  • Support for version 2015.4 of the Xilinx SDK
  • Zynq UltraScale+ MPSoC support for both the APU(Cortex-A53) and RPU(Cortex-R5)

Requirements

  • Vivado 2015.1

Bug fixes

All platforms

...

Release date : 2015-10-15

New features & improvements

  • Added options to activate the Zynq-7000 instruction and data caches earlier in the startup process to speed up boot time
  • Module initialization can now be disabled on a per module basis
  • New function UCOS_IntTypeSet() to change an interrupt's trigger type
  • Improved OpenAMP support and configuration
  • Added OpenAMP support for the MicroBlaze
  • New USB Host MSC demonstration template
  • Cache support for the MicroBlaze

Requirements

  • Vivado 2015.1

Bug fixes

All platforms

...

Release date : 2015-07-03

New features & improvements

  • USB support with the addition of the uC/USB-Device and uC/USB-Host software modules
  • CAN connectivity support with the addition of uC/CAN
  • New network modules: MQTT Client, TELNET Server and IPerf
  • Improved AMP support with the addition of the OpenAMP extension

Requirements

  • Vivado 2015.1

Bug fixes

All platforms

...

Release date : 2015-05-27

New features & improvements

  • Storage support with the addition of the uC/FS embedded file system
  • Dynamic ticking support for uC/OS-III when running on the Cortex-A9
  • Timestamp support (optional) on the MicroBlaze with the usage of an additional 64 bit AXI Timer

Requirements

  • Vivado 2015.1

Bug fixes

All platforms

...

Release date : 2015-04-06

New features & improvements

  • N/A

Requirements

  • Vivado 2014.4

Bug fixes

All platforms

...

Release date : 2015-03-21

Requirements

  • Vivado 2014.4

New features & improvements

  • Networking support with the uC/TCP-IP protocol stack. Also includes the uC/DNSc and uC/DHCPc DNS and DHCP client applications as well as the uC/HTTPc http client.
  • Ethernet MAC drivers for the Zynq-7000 Gigabit Ethernet and the AXI Ethernet Lite soft IP.
  • AMP configuration support. Allowing the generation of a slave application on the second core of the Zynq-7000.
  • Improved performance and compatibility on the MicroBlaze.
    • MicroBlaze cores without the MSR instruction are now supported.
    • Improved performance on MicroBlaze cores with the pattern comparator.
  • Improved performance on the Cortex-A9 when enabling core specific optimizations.
  • More verbose BSP generation and OS init.
    • A new log called ucos.log is generated along with the BSP to help diagnose configuration issues.
    • When enabled in the BSP global configuration, output messages are generated on the chosen serial interface during init.

...

Release date : 2015-02-16

Requirements

  • Vivado 2014.4

New features & improvements

  • N/A

Changes

  • N/A

Bug fixes

All platforms

...

Release date : 2014-01-29

Requirements

  • Vivado 2014.4

New features & improvements

  • A custom handler can be registered for the Cortex-A9 FIQ interrupt signal. This can be done by defining the UCOS_Int_FIQ_Hander() function in user code. Note that usage of the IRQ/FIQ lines from the PL is discouraged when running the Micrium BSP.

...

Release date : 2014-11-11

Requirements

  • Vivado 2014.3

New features & improvements

  • N/A

Changes

  • BSP configuration options STDIN and STDOUT merged into one configuration STDIN_OUT selecting both the input and output UART at the same time

...

Release date : 2014-10-31

Requirements

  • Vivado 2014.3

New features & improvements

  • Initial release
  • µC/OS-II and µC/OS-III
  • Cortex-A9 and MicroBlaze support

...